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This paper provides a performance impact of Intel Data Direct I/O technology (DDIO) on applications, and models DDIO in gem5 simulator. paper slides video

QEI: Query Acceleration Can be Generic and Efficient in the Cloud

Published in HPCA, 2021

This paper proposes a generic accelerator architecture for fine-gained latency-sensitive queries in various data structures. It also proposes a hybrid scheme for the accelerator to be efficiently integrated into modern server CPU. paper slides

Don’t Forget the I/O When Allocating Your LLC

Published in ISCA, 2021

This paper proposes the first I/O-aware LLC management mechanism for performance isolation in DDIO-enable platform. paper arXiv version slides

Unlocking the Power of Inline Floating-Point Operations on Programmable Switches

Published in NSDI, 2022

This paper proposes a versatile and flexible approach for floating-point number representation, storage, and operations in modern RMT-based programmable switches, which can benefit a wide range of distributed applications, including distributed training and database query. paper (including video) arXiv (extended) version slides

IDIO: Network-Driven, Inbound Network Data Orchestration on Server Processors

Published in MICRO, 2022

This paper proposes a intelligent and flexible mechanism for inbound traffic destination steering to reduce data movement in the cache/memory hierarchy and thus improve the inbound I/O performance. paper slides

A Quantitative Analysis and Guidelines of Data Streaming Accelerator in ModernIntel Xeon Scalable Processors

Published in ASPLOS, 2024

This paper is the authentic characterization study of Intel Data Streaming Accelerator (DSA) in modern Intel Xeon Scalable Processors. It provides introduction, performance analysis, optimization guide, ecosystem, and real use cases of DSA. paper arXiv version slides

Published in , 1900

Accelerating Distributed Reinforcement Learning with In-Switch Computing

Published in NSDI (poseter), ISCA (full paper), 2019

This paper presents an algorithm/hardware co-design to accelerate gradient aggregation in distributed reinforcement learning training. paper slides

RAMBDA: RDMA-driven Acceleration Framework for Memory-intensive us-scale Datacenter Applications

Published in HPCA, 2023

Responding to the “datacenter tax” and “killer microseconds” problems, this paper proposes a holistic solution for us-scale datacenter applications accelerations, leveraging emerging RDMA and cache-coherent accelerator techniques. paper arXiv version slides

STYX: Exploiting SmartNIC Capability to Reduce Datacenter Memory Tax

Published in ATC, 2023

This paper proposes to take advantage of the capability of SmartNICs in the datacenter to offload a set of expensive kernel memory management tasks, so that the CPU cycles and cache pollution can be significantly reduced. paper (including video and slides)

Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices

Published in MICRO, 2023

This paper is the first-ever characterization study of real commodity CXL memory devices. We develop and open-source MEMO benchmark for CXL memory testing, and develop a auto-tuning algorithm to make the most out of the CXL devices as not only capacity expander but also bandwidth expander. paper arXiv version slides

Nomad: Non-Exclusive Memory Tiering via Transactional Page Migration

Published in OSDI, 2024

This paper presents a novel tiered memory management software system based on emerging CXL memory.

Yifan Yuan

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patents

Workload Scheduler for Memory Allocation

Efficiently Merging Non-identical Pages in Kernel Same-page Merging (KSM) for Efficient and Im- proved Memory Deduplication and Security

Method and Appratus for Batching Pages for a Data Movement Accelerator

Offload of Data Lookup Operations

Data Consistency and Durability over Distributed Persistent Memory Systems

publications

A Network-Centric Hardware/Algorithm Co-Design to Accelerate Distributed Training of Deep Neural Networks

HALO: Accelerating Flow Classification for Scalable Packet Processing in NFV

Data Direct I/O Characterization for Future I/O System Exploration